Amit Padey is a Senior Analog Design Engineer at Synopsys Inc, where they are currently engaged in advanced design projects. They previously worked as a Quantitative Brain Researcher at WorldQuant, focusing on developing trading strategies using machine learning and statistical techniques. Amit obtained a Bachelor of Technology in Electrical and Electronics Engineering from the Bhilai Institute of Technology and is pursuing a Master of Technology from the Indian Institute of Technology, Kanpur.
Location
Kanpur, India
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