Anil Arora is a seasoned professional in the field of software engineering and architecture with over 20 years of experience. Currently serving as a Sr Architect at Synopsys Inc since February 2023, Anil previously held the role of Principal Engineer at Siemens EDA from May 2006 to January 2023, focusing on architecture creation, flow development in Analog Digital Mixed Signal simulation, real number modeling, Verilog-AMS discipline resolution, complex design topologies, SV elaboration, and Verilog Procedural Interface in Simulation. Anil's career also includes time as a Senior Software Engineer at Agilent Technologies and as a Software Engineer at STMicroelectronics. Anil holds a Bachelor of Engineering degree in Electronics and Communication from Thapar Institute of Engineering & Technology, completed in 2001.
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