Anu Augustine

Anu Augustine is a Staff Engineer at Synopsys, where they are responsible for all aspects of Physical Design for Blocks, including various complex tasks such as Floorplanning and Timing analysis. Anu previously held positions as a SoC Design Engineer at Intel Corporation and as a VLSI Engineer at Wipro Digital Operations and Platforms. They also served as an Assistant Professor at both the College of Engineering and Royal College of Engineering and Technology. Anu completed their M.Tech in Electrical, Electronics and Communications Engineering from Cochin University of Science and Technology and is currently pursuing a B.Tech in the same field at Mahatma Gandhi University, Kottayam.