Ashan Peiris is a Senior Staff Research and Development Engineer at Synopsys, specializing in MIPI CSI/DSI/UFS interface IP FPGA prototyping, validation, and software development for ARM, ARC, and RISC-V processors. Ashan has previously worked as a Verification Engineer at Atrenta and has held various roles at Synopsys, including Senior Application Engineer and Senior R&D Engineer. Ashan holds a Master of Technology in Microelectronics and a Bachelor of Science (Hons) in Electronic and Telecommunication Engineering. Currently, Ashan is pursuing a Master of Science degree in Computer Science, focusing on Data Science, Analytics, and Engineering, at the University of Moratuwa.
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