Ashish Agrawal

Ashish Agrawal is a Principal Engineer at Synopsys with over 10 years of experience in C/C++ programming, algorithms, and data structures. Previously, they worked at Mentor Graphics as a Consulting Member of Technical Staff, where they developed and enhanced key modules for FPGA synthesis and schematic generation. Ashish has contributed to the field through thought leadership, co-authoring two IEEE publications, and receiving the Best Paper Award at the IEEE EWDTS’08. They earned a Bachelor of Technology in Electrical, Electronics, and Communications Engineering from the Indian Institute of Technology, Roorkee.