Avinash Mane is a Senior Staff Applications Engineer at Synopsys, specializing in Verilog, System Verilog, digital design, FPGA, ASIC design, verification, C, C++, Perl, DFT, and circuit design. They previously worked as a CONEP Final Test Technician at Intersil, where they gained insights into manual testing procedures, and served as a Project Intern at the Tata Institute of Fundamental Research, contributing to the development of a PCI board based platform. Additionally, they have experience as a Software Engineer at Accenture, focusing on a billing transformation project after completing their education, which includes a Master’s degree in Electrical Engineering from San Jose State University and a Bachelor’s degree in Electronics Engineering from the University of Mumbai.
Location
San Jose, United States