Brahma Reddy is a Principal Application Engineer at Synopsys EDA, specializing in Physical Verification DRC Rule Deck development with over 5 years of experience. They have previously worked as a Lead Application Engineer at Cadence Design Systems from 2013 to 2019, where they developed rule decks for multiple foundries. Prior to that, Brahma was a Research Engineer at IBM from 2012 to 2013 and held a CAE position at Synopsys from 2011 to 2012. They earned a B-Tech in ECE from MGIT and a M-Tech in VLSI Design from VIT University.
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