Brijesh Gupta is an experienced Analog Layout Designer with a demonstrated history in the semiconductor industry. They currently work as a Layout Design Staff Engineer at Synopsys, focusing on a DDR project utilizing GF 12nm technology. Previously, Brijesh has held positions at various companies, including INVECAS and Mirafra Technologies, and gained foundational skills as a trainee at VEDA IIT. They possess expertise in tools such as Synopsys Custom Compiler and Cadence Virtuoso, along with proficiency in scripting languages like TCL, SKILL, and PERL. Brijesh holds strong knowledge of layout fundamentals and has worked on projects involving Serdes and USB technologies.
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