Changlin Jiang is a Senior Staff Engineer at Synopsys, where they build large-scale simulation and data platforms that advance innovation. They previously served as a Lead R&D Engineer and Senior R&D Engineer at Ansys from 2020 to 2023, following roles as a Graduate Research and Teaching Assistant at Carnegie Mellon University from 2018 to 2020. Changlin also interned at Chentao Capital and Los Alamos National Laboratory, and holds a Master of Science in Mechanical Engineering from Carnegie Mellon University and a Bachelor of Science from Shanghai Jiao Tong University.
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