Cheng-yun Chen

Cheng-yun Chen is a Senior Director at Synopsys Inc, managing the R&D and deployment of in-circuit emulation technologies and specializing in system-level verification. Previously, Cheng-yun held the position of Design Architect at Synopsys, where they focused on interfacing circuits and various protocols. Prior to this, Cheng-yun was a Design Engineering Architect at Cadence Design Systems from 2001 to 2022, where they contributed to test equipment for in-circuit hardware emulators. Cheng-yun earned a Master’s degree in Electrical Engineering from Stanford University and a Bachelor’s degree from National Taiwan University.