Ching-Wei Yang is a Sr. Staff R&D Engineer at Synopsys Inc, building on a strong background in device modeling and ESD engineering from their previous role as a Senior Device Modeling Engineer at 台積電. They also served as a Principal Software Engineer at Cadence Design Systems prior to returning to Synopsys as a Staff R&D Engineer. Ching-Wei holds both a Master's and a Bachelor's degree from National Chiao Tung University, and they participated in an exchange program at the University of Illinois at Urbana-Champaign.
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