Deep Gupta

Deep Gupta is a Senior Staff Design Engineer at Synopsys Inc., specializing in memory compilers and custom memories. They previously held roles at NVIDIA, where they designed and delivered high-density Level 2/3 cache memories, and at AMD, focusing on low-power SRAM compilers. Deep has a Master of Science in Electrical Engineering with a concentration in VLSI from the University of Southern California and has contributed to various projects throughout their career, including significant design work at Samsung Electronics and Intel Corporation. Their extensive experience encompasses physical design, timing closure, and mentoring juniors in the field.