Deepika Chittella

Deepika Chittella is a Staff Engineer at Synopsys Inc, where they have been working since 2024 after serving as an Application Engineer since 2019. Prior to joining Synopsys, Deepika worked as a Project Associate on the 5G Test Bed project at IIT Hyderabad from 2018 to 2019. Deepika holds a Master of Technology in VLSI Design from Gandhi Institute of Technology & Management University, completed in 2018, and a Bachelor of Technology in Electrical, Electronics, and Communications Engineering from Gayatri Vidya Parishad College of Engineering for Women, which they completed in 2016. Deepika possesses skills in TCAD, High Level Synthesis, and Verilog.