Deepika Pathak

Deepika Pathak is a Senior Application Engineer at Synopsys Inc, where they focus on ensuring the quality and performance of the Fusion Compiler Tool. With a Master of Technology in VLSI & Embedded Systems from IIIT-Gwalior, Deepika has previously worked as a Static Timing Analysis Engineer at Cadence Design Systems and a Radio Frequency Engineer at VTOL Aviation India. Their expertise includes addressing customer RTL to GDSII timing issues and enhancing tool quality through detailed analysis. Passionate about physical design, Deepika thrives in collaborative environments and is committed to operational excellence.