Deepika Vemula is a Product Applications Engineer currently working for the VCS Product Validation group at Synopsys, focusing on HDL, Verilog, System Verilog, and UVM tools. Previously, Deepika served as an IP and Tools Product Apps Engineer at Xilinx from 2012 to 2018, where they provided technical support to major clients such as Cisco and Samsung and specialized in advanced design methodologies. Deepika also held the position of Senior Applications Engineer II at Synopsys from 2018 to 2022, contributing to the quality assurance of VCS products and assisting customers with product-related queries. Deepika earned a Bachelor of Technology in Electrical, Electronics and Communications Engineering from Bvrit in 2012.
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