DP

Devraj Patil

ASIC Digital Design, Senior Engineer

Devraj Patil is currently pursuing a Master's thesis in Advanced Digital System Design at Karlsruhe Institute of Technology (KIT), Germany, under the DAAD KOSPIE Scholarship. They previously completed a Master of Technology in System and Control Engineering from the Indian Institute of Technology, Roorkee, and a Bachelor of Technology in Electrical Engineering from the College of Engineering Pune. Devraj has gained professional experience as a Senior Engineer in ASIC Digital Design at Synopsys Inc. and as a Graduate Trainer Engineer at Siemens.

Location

India


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