Dinesh G is currently a Staff Engineer in ASIC Physical Design at Synopsys Inc., specializing in the implementation of netlist to GDS at the IP level. Dinesh has previously held roles as a Senior Physical Design Engineer at Intel Corporation and a Lead Engineer at HCL Technologies. Dinesh's early experience includes a 20-day internship focused on motion planning of multiple robots under the guidance of Dr. V. Sankaranarayanan. Dinesh earned a Bachelor's degree in Electrical and Electronics Engineering from Alagappa Chettiar College of Engineering & Technology in 2018.
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