Divya Pant is a dedicated ASIC Digital Design Senior Engineer at Synopsys, specializing in digital design and VLSI with a focus on high-speed SerDes PHY PCIe6 IP. As a graduate of Indira Gandhi Delhi Technical University for Women, Divya earned a Bachelor of Technology in Electronics and Communications Engineering and is currently pursuing a Master of Technology in Microelectronics at BITS Pilani. Previously, Divya held several leadership roles, including President of Lean In @IGDTUW, where they empowered women in engineering through various technical circles. Passionate about continuous learning and skill enhancement, Divya contributes significantly to team dynamics and project developments.
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