Gelli Kavya is a Staff Engineer specializing in SerDes Layout Design at Synopsys, where they have honed their skills in analog and mixed signal block level layout. Gelli previously worked at Micron Technology as a Layout Design Engineer, gaining extensive experience in custom memory layout and timing closure. They hold a Master of Technology in Micro-electronics Engineering from the Birla Institute of Technology and Science, Pilani, and a Bachelor of Technology in Electronics and Communications Engineering from the National Institute of Technology Warangal. Gelli is proficient in tools such as Calibre, Cadence Virtuoso, and Synopsys Custom Compiler, and possesses deep knowledge in MOSFET, FINFET, and circuit design.
Location
Hyderabad, India
This person is not in any offices