Gioele M. is a Sr. Staff Engineer at Synopsys, specializing in Design Technology Co-Optimization (DTCO) within the Physical Design Research group at imec. They hold a Master's degree and a Ph.D. in Electrical and Electronics Engineering, focusing on 2-Dimensional Semiconductors from Tyndall National Institute. Previously, Gioele has worked as a Research and Development Engineer at imec, where they contributed to the development of digital standard cell libraries for advanced CMOS technology nodes. Their expertise includes various semiconductor characterization techniques and TCAD modeling, alongside strong skills in time management, teamwork, and leadership.
This person is not in the org chart
This person is not in any teams
This person is not in any offices