Hema Govindan is a skilled layout engineer with extensive experience in semiconductor design. Hema has worked at DIGICOMM Semiconductor Private Limited as a Senior Layout Engineer, and previously held positions at Zia Semiconductors as Layout Design Engineer II, where key projects included the design and characterization of SPREG in TSMC 40 nm technology. Additional experience includes consulting roles at Qualcomm and NVIDIA, focusing on memory layout enhancements and True Random Number Generator designs, respectively. Currently, Hema serves as a Layout Design Staff Engineer at Synopsys Inc and a Senior Layout Engineer at leadIC Design Pvt Ltd, working on advanced projects such as a 24GHz SerDes in 5nm TSMC. Hema holds a Bachelor’s Degree in Electrical and Electronics Engineering from the University of Kerala.
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