Hepi Bhatiya is a Staff Engineer at Synopsys with over four years of experience in the physical design domain, specializing in advanced technology nodes such as N2, 18A, and 5nm. They have worked extensively with Synopsys tools, including DSO.ai and DesignDash ML, to enhance PPA while ensuring robust design flows. Previously, Hepi contributed as an intern at Intel and served as a Design Engineer at Hitachi, where they focused on power electronics and project support. They hold a Bachelor's degree in Engineering from L.D College of Engineering and a Master's in Technology, specializing in VLSI, from Nirma University.
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