Himanshu Bhatiani

Staff ASIC Design Verification Engineer

Himanshu Bhatiani is a highly accomplished Staff Verification Engineer at Synopsys with six years of experience in the semiconductor industry. They specialize in ASIC and FPGA verification, demonstrating a deep understanding of methodologies like UVM and SystemVerilog. Previously, Himanshu held the role of Senior Verification Engineer at Microchip Technology, where they developed verification strategies and collaborated with cross-functional teams to ensure system integration. Prior to that, they worked as a Verification Engineer and intern at Cadence Design Systems, focusing on functional verification of simulation tools. Himanshu's academic background includes a PG Diploma in VLSI and a Bachelor's in Electronics and Communication Engineering.

Location

New Delhi, India

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