Hitesh Garg is a Senior Staff Engineer at Synopsys Inc with over six years of industry experience, including more than five years in the CAD EDA field. Hitesh developed various CAD automation flows to optimize work processes and created testing structures for QA purposes. They hold a Master of Technology in VLSI Design & Embedded Systems from Delhi Technological University and have experience interfacing with foundries to address technology-related issues. Hitesh is skilled in debugging, design flow development, and tool automation, demonstrating effective communication and collaboration abilities.
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