Hung Thai is a skilled UCIe IO Layout Engineer currently serving as a Senior Supervisor in A&MS Layout Design at Synopsys Inc. They previously held the position of A&MS Layout Design Engineer at eSilicon from 2019 to 2020. Hung obtained a degree in Electrical, Electronics, and Communications Engineering from Danang University of Science and Technology between 2014 and 2019. They specialize in analog layout design for I/O designs, focusing on advanced technodes including 3nm, 5nm, and 7nm.
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