Iyrine Babu

Iyrine Babu is a mid-level Physical Design Engineer specializing in SoC design. They have experience in hierarchical flow physical design integration and digital implementation for advanced node ICs, working from RTL to GDSII. Iyrine’s expertise includes high frequency design methodologies, block-level and full-chip floor-planning, and timing closure, with knowledge spanning technology nodes of 7 nm, 10 nm, and 28 nm. They have worked at Synopsys Inc and Cerium Systems, and completed a summer internship at the Indian Institute of Science. Iyrine holds a Bachelor of Technology in Electrical, Electronics, and Communications Engineering from Model Engineering College.