James Lin has extensive experience in analog and mixed signal design, currently serving as Sr Manager at Synopsys Inc since September 2014, after holding various roles including Manager II and Staff Analog Designer. Prior to this, James worked at AMD as MTS Analog Designer from March 2010 to September 2014, and at Fresco Microchip as an Analog Designer from January 2006 to March 2010. Earlier in his career, James was an R&D Engineer at Synopsys from 2003 to 2005. James Lin earned a Bachelor of Applied Science degree in Electrical Engineering from the University of Waterloo between 1998 and 2003.
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