Jamuna M D is currently a Staff Engineer at Synopsys Inc, having transitioned from a Senior Design Verification Engineer at AISemiCon. Previously, Jamuna worked as a Design Verification Engineer at Kalatronics Semiconductors and as a Design Verification Trainee at QSoCs Technologies. Jamuna holds a Bachelor of Engineering in Electrical, Electronics and Communications Engineering from Visvesvaraya Technological University, completed in 2018.
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