Jaswanth Kumar Yadlapalli is a Senior Layout Engineer with extensive experience in various technologies, including TSMC, GF, and Intel processes. They have worked on significant blocks such as RX, TX, HBM, and power management, demonstrating expertise in physical verification and layout design. Currently employed as a Senior Analog Layout Engineer at Western Digital Pvt Ltd, Jaswanth has previously held roles at Synopsys Inc and completed an internship at Core Circuit Semiconductors Pvt. Ltd. They hold a Bachelor of Technology in Electronics and Communications Engineering from NRI College of Engineering.
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