Jayjeet Sarkar is a Senior Engineer in R&D Engineering at Synopsys Inc., where they focus on ASIC design and innovation. Previously, Jayjeet worked at Alphawave Semi as an Engineer II in ASIC Design, contributing to complex projects involving TSMC 5nm technology. They began their engineering journey with a Bachelor of Technology in Electronics and Communication Engineering from Jalpaiguri Government Engineering College, further enriching their expertise through internships and training in various roles within the semiconductor field. Jayjeet's commitment to advancing physical design engineering is demonstrated through collaborative efforts on technology nodes ranging from 40nm to 5nm.
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