Jiaojiao Ou is a Senior Staff R&D Engineer at Synopsys Inc, where they focus on enhancing system performance through machine learning and hardware-firmware co-design. They have led projects that significantly improved performance metrics, such as a 15% average enhancement in system-router performance and up to 14% improvements in Multi-Unit customer designs. Previously, Jiaojiao gained experience as a summer research intern at GLOBALFOUNDRIES, Mentor Graphics, and ARM. Their research interests center on algorithm development for Physical Design Automation, Design for Manufacturing, and CAD Optimization.
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