Jitander Rawat is a Staff Engineer at Synopsys, currently working on VSO.ai as a Product Expert. They possess strong knowledge in digital electronics, Verilog, System Verilog, and various verification methodologies. Previously, Jitander held positions at HCL Technologies as a Lead Engineer, Wipro as a Senior Project Engineer, and 3ST Technologies as a Design Verification Engineer. They began their educational journey at Maharshi Dayanand University Rohtak, where they earned a degree in Electronics and Communication.
Location
Palwal, India
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