Karthik Shet is currently a Senior Application Engineer at Synopsys, with a strong enthusiasm for the VLSI domain. They previously held positions as a Product Application Engineer and a Technical Engineering Intern at Synopsys. Karthik also gained experience as a Summer Intern at e-Yantra, IIT Bombay, focusing on FPGA design for Embedded Systems, and completed an Analog Layout Design Internship at Texas Instruments. Karthik earned a Bachelor of Engineering in Electrical, Electronics and Communications Engineering from RNS Institute of Technology in India.
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