kavitha s c

Kavitha S.C. is an ASIC Physical Design Staff Engineer at Synopsys Inc., where they have been working since 2022. With over seven years of experience in physical design engineering, Kavitha has managed multiple IP blocks and was responsible for RTL to GDSII, STA, PV, and EMIR signoffs as part of the IP team. Previously, they worked as a Physical Design Engineer at Ambit Semiconductors from 2018 to 2020 and interned at SM Electronic Technologies Pvt. Ltd. from 2016 to 2017. Kavitha holds a Bachelor of Engineering in Electronics and Communications Engineering from Sapthagiri College of Engineering and a Master of Technology in VLSI and Embedded Systems from Siddaganga Institute of Technology, Tumkur.