Keerthykrishna Ramakrishnan is currently an Application Engineer at Synopsys in California and is pursuing a Master of Science in Electrical and Computer Engineering at Santa Clara University, expected to graduate in 2024. Previously, they served as a Memory Layout Engineer at Synopsys from 2019 to 2021, where they performed design rule checks and quality assurance for advanced technology nodes. Keerthykrishna also gained experience as a Design Engineer Intern at Intel Corporation and has held various roles at Santa Clara University, including Teaching Assistant and Student Assistant. Most recently, they completed an internship as a Left Shift Implementation Intern at Qualcomm in 2023 and are seeking further opportunities in digital design engineering.
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