Navneet Khullar is a seasoned engineering executive with extensive experience in the semiconductor industry, currently serving as Vice President of Engineering at Synopsys Inc since September 2011, where previous positions included Executive Director and Sr. Director of R&D Engineering. Prior to Synopsys, Navneet held the role of Design Centre Head at Virage Logic and worked for NXP Semiconductors as a Sr. Engineering Manager. Early career experiences include positions at Cadence Design Systems as a Sr. Design Engineer and at STMicroelectronics as a Design Engineer. Navneet holds a Bachelor of Engineering in Electronics & Communications from Delhi Institute of Technology and has pursued further education at prestigious institutions such as Ashridge Business School, Columbia Business School, and Indian School of Business.
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