Kiran J. is an accomplished electrical engineer specializing in digital IC design, verification, and mixed-signal design. Currently a Senior Analog Design Engineer at Synopsys Inc, Kiran has previously contributed as a Graduate Research Assistant and Teaching Assistant at Wright State University, where they developed a high-performance digital wideband receiver and taught digital system modeling. Kiran has also gained experience at Ambarella Inc, automating timing assertions for MIPI protocols, and has trained over 100 students in digital design concepts. Kiran holds a Doctor of Philosophy from Wright State University and a Bachelor of Engineering from PES University.
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