Komal Arora is a Senior Manager at Synopsys, currently leading projects in advanced IC technologies. With over a decade of experience, they have specialized in full custom layout methodology and analog layout development, particularly in backend activities such as physical verification and testchip development. Previously, Komal served as a Principal Design Engineer at Cadence Design Systems and an Engineer at STMicroelectronics. Their expertise encompasses a comprehensive understanding of the IP development cycle, ESD, and various layout design technologies, with notable achievements including a Best Paper Award at CDNLive 2018.
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