Kuldeep Singh is currently a Staff Engineer in Analog Design at Synopsys, where they contribute to high-speed CML driver technology for 224GBPS Serdes. Kuldeep previously held positions at Synopsys as an Analog Circuit Design Engineer and at INVECAS as an Engineer 1. Before this, they completed a traineeship as an Analog Mixed Signal Design Engineer at Soctronics, focusing on data converters. Kuldeep pursued VLSI Analog Design studies at VEDA IIT Hyderabad from 2018 to 2019, and earned their undergraduate education at SKIT Jaipur from 2014 to 2018.
Location
Hyderabad, India
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