Linh Le is a Senior Manager in ASIC Digital Design, currently overseeing projects at Synopsys Inc since 2020. With a robust background in VLSI, Linh previously served as Design Manager at Savarti Analog Mixed Signal from 2015 to 2020 and worked as an ASIC Design Engineer at Viettel R&D in 2014-2015. Linh began their career as a Staff Engineer at Renesas Design Vietnam Co., Ltd. from 2006 to 2013. Linh earned a Bachelor of Science in Information Technology from the University of Natural Sciences in Ho Chi Minh City, Vietnam, in 2006.
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