Maison Worroll is a seasoned engineering professional with extensive experience in R&D and design roles within the semiconductor and telecommunications industries. Currently serving as Director of R&D at Synopsys Inc since November 2020, Maison also contributes as an ASIC Component Design Engineer at Intel Corporation since February 2014, focusing on SoC devices for the 3G, LTE, and 5G markets. Previous roles include Engineering Manager and Principal Engineer at Moortec Semiconductor Limited, along with a tenure as Principal Design Engineer at Mindspeed Technologies, where insights as an ARM processor system architect were developed. Earlier career highlights feature positions as Senior Engineer at Zarlink Semiconductor, specializing in network and digital television products, and as Senior Design Engineer at J & S Marine Ltd, engaged in naval weapons and communications systems. Maison holds a Higher National Diploma in Electrical & Electronic Engineering from the University of Plymouth.
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