Makrand Marpakwar has extensive experience in the semiconductor industry, currently serving as a Senior Manager in R&D (High Speed SerDes) at Synopsys Inc since March 2018. Prior roles include Manager at Microchip Technology from January 2014 to May 2015, where responsibilities included layout design for Analog/Mixed Signal Blocks and full chip verification, and Module Lead at Altran in 2015. Additionally, Makrand has worked in layout design in the Memory Product Division at Cypress Semiconductor India from September 2012 to December 2013, and held positions as Senior Member Technical Staff at KPIT Cummins from August 2008 to August 2012 and Design Engineer at Sasken Communication Technologies from 2006 to 2008. Makrand holds a Bachelor of Engineering (B.E.) in Electronics from Yeshwantrao Chavan College of Engineering, completed in 2005.
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