Manish Patel is a Staff Engineer specializing in ASIC Digital Design at Synopsys, focusing on high-speed multiprotocol SerDes development. They previously worked as a Design Engineer II at Cadence Design Systems from 2018 to 2021. Manish holds a Master’s Degree from the National Institute of Technology Calicut and a Bachelor of Technology from the Greater Noida Institute of Technology.
Location
Bengaluru, India
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