Mathan Raj is an experienced ASIC verification engineer with a robust background in digital design. They began their career at SmartDV Technologies India Private Limited from 2015 to 2018, where they specialized in ASIC verification. Following that, they served as a Verification Engineer II at Cientra from 2018 to 2021. Mathan Raj then advanced to Synopsys Inc, first as a Senior ASIC Digital Design Engineer from 2022 to 2023, and currently holds the position of Staff Engineer in ASIC Digital Design since 2024. They earned a Bachelor of Engineering in Electrical, Electronics, and Communications Engineering from Kamaraj College of Engineering and Technology in 2015.
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