Max Stekelenburg

Max Stekelenburg is a Senior Design Engineer at Synopsys Inc, specializing in IP design, system integration, verification, and chip architecture. Prior to this role, Max gained valuable experience as a Senior Design Engineer at NXP Semiconductors, focusing on IC architecture and SoC specifications. Max began their career as a consultant at Yacht and Altran, where they worked on embedded software, FPGA design, and SoC design. Educated at the University of Twente, Max has built a solid foundation in engineering and is skilled at both independent work and team leadership.