Mayank .

Mayank is a Senior Design Verification Engineer at Synopsys, specializing in eUSB2/eUSB2V2 protocol verification. They previously served as a Senior R&D Engineer and R&D Engineer I at Synopsys, with earlier experience as a Graduate Engineer Trainee. Mayank designed various VLSI circuits during a brief stint at the E&ICT Academy IIT Guwahati and has practical training in VLSI design from DKOP Labs Pvt. Ltd. They earned a B.Tech in Electronics and Communication Engineering from the Indian Institute of Information Technology Senapati, Manipur in 2021.