Mayank Aggarwal

Mayank Aggarwal is a skilled Analog & Mixed Signal Circuit Design Engineer Sr I at Synopsys Inc, where they focus on high-speed SERDES IP design. They previously held roles at Texas Instruments, where they designed various analog circuits and contributed to silicon validation. Mayank completed their M.A.Sc at the University of Toronto, where they also served as a Graduate Research Student and Teaching Assistant. They have interned at ISRO and Tata Motors, gaining valuable experience in satellite communication and power distribution systems. As a silver medallist from IIT Patna, Mayank has a strong foundation in analog design and is currently open to new opportunities in the field.