Mayank Chauhan

Mayank Chauhan is a Senior Staff Applications Engineer at Synopsys Inc, where they focus on front-end functional verification, including dynamic low power and power-aware verification for various designs. Previously, Mayank worked as an ASIC Verification Engineer at eInfochips, specializing in low power methodologies and UPF creation. They possess skills in HDL languages such as Verilog and System Verilog, along with proficiency in various programming and scripting languages.