Miguel Caetano

Miguel Caetano is a Principal Engineer specializing in ASIC Digital Design at Synopsys Inc. They have amassed extensive experience in hardware digital design, verification, and analog IC design. Previously, Miguel worked as a RF Research Engineer at Microelectronics' Students Groups and as a Trainee at Accenture Technology Solutions. They hold a Master’s degree in Electrical and Computers Engineering from Faculdade de Engenharia da Universidade do Porto.