Miles Lee

Miles Lee is an accomplished professional in ASIC digital design and verification with extensive experience in leading design teams and managing complex projects. Currently serving as the Director of ASIC Digital Design at Synopsys Inc since November 2017, Miles specializes in tool-facilitated design enhancement and low power design methodologies for SNPS Interface IPs. Prior roles include Sr. Manager of ASIC Digital Design at Synopsys, where responsibilities encompassed DDRPHY IP design, verification, and test coverage. Previously, Miles held positions at Oracle and Sun Microsystems, focusing on processor logic verification, hardware management, RTL design, and FPGA prototyping. With a Master’s degree in Electrical Engineering from the University of Southern California, Miles has a strong foundation in computer hardware, architecture, and design.